HDL #2 – Simulation and Testbench of Digital Circuits Design

  Hello Robonesians, in the world of digital circuit design, whether for FPGAs or ASICs, there is one crucial stage before a design is realized into physical hardware: simulation. Simulation cannot be separated from the testbench, because the testbench is the “driving engine” that makes digital circuit design simulations possible. For beginners, questions often arise: […]

Verilog #6: Numbers in Verilog Programming

  Hello Robonesians, this article will explain numbers in Verilog programming. The discussion will cover the definition of numbers, number types, base/radix, bit size/width, and recommended and non-recommended number representation formats in Verilog programming.   6.1 Numbers in Verilog Programming Numbers in Verilog programming are a fundamental concept used to represent numeric values in digital […]

Verilog #4: Important Things in Verilog Programming

  Hello Robonesians, here are some important things that HDL (Hardware description language) programmers need to know when building digital systems using the Verilog programming language.   4.1 Ports in Verilog Programming In Verilog programming, ports connected to a module can be of three types: The input port used to enter the module. Declaring a […]

Verilog #3: Pre-Define Library In Verilog Programming

  Hello Robonesians, if we compare Verilog HDL programming with VHDL programming, there are quite striking differences in terms of pre-defined libraries and the way both manage built-in resources.   3.1 Differences in the Concept of “Library” between VHDL and Verilog VHDL has an explicit library system, namely “library” and “use”, with several pre-defined packages […]

Verilog #2: Verilog Program Structure

  Hello Robonesians, after learning about Verilog programming in the previous article (Getting to Know Verilog Programming), in this article, we’ll continue our learning of Verilog programming, specifically exploring the structure of the Verilog programming language (Module Definition) and how to instantiate those modules. The Verilog program structures presented in this article are based on […]

Verilog #1: Getting to Know Verilog Programming

  Hello Robonesians, after previously we have studied together the HDL hardware description programming language, namely VHDL , in this article and God willing, in the next few articles, we will invite all friends to learn the HDL programming language which is the successor to the VHDL programming language, namely the Verilog programming language. 1.1 […]

error: Content is protected !!